Walkthrough — Design an 800V SiC EV Traction Inverter
A first-principles design walkthrough for a Tesla Plaid-class 800 V silicon-carbide (SiC) traction inverter delivering 250 kW (335 hp) continuous and 350 kW (469 hp) peak. The walkthrough threads each section into the Engineering and Robotics Tier-3 notes so every paragraph anchors to a canonical reference. SI units are primary, US customary units appear in parentheses where they aid intuition.
1. What we’re building
A 3-phase, 2-level voltage-source inverter (VSI) for a battery electric vehicle (BEV) traction drive. Nominal DC-link voltage is 800 V (operating range 650–900 V across full state-of-charge sweep and regen), feeding a permanent-magnet synchronous machine with interior magnets (IPM-PMSM) rated to ≈ 20 000 rpm. Continuous shaft power 250 kW (≈ 335 hp), peak 350 kW (≈ 469 hp) for 30 s with thermal headroom for one full 0-to-V_max launch followed by a second within 60 s.
Cooling is water-ethylene-glycol (WEG) 50/50 flowing through an aluminum cold-plate beneath the power module, shared with the motor jacket loop. Inverter mass target < 12 kg (26.5 lb), volume target < 8 L (≈ 488 in³), giving volumetric power density > 31 kW/L and gravimetric > 21 kW/kg — both inside the 2025-class Tesla Plaid / Lucid Air envelope.
Functional safety target ISO 26262 ASIL-D (independent shutoff path via the safe-state pin on the gate driver), production quality IATF 16949:2016, cybersecurity ISO/SAE 21434. The inverter must survive 15-year automotive service life (≈ 8 000 driving hours, > 100 000 power cycles), pass CISPR 25 Class 5 EMC, and meet ISO 16750 environmental robustness including IP67 sealing against pressure-wash and submersion.
This is a power-electronics, control, thermal, packaging, and EMC problem braided together — see power-electronics for the umbrella discipline and motion-control for the motor-drive perspective.
2. Top-level specification
| Parameter | Value | Notes |
|---|---|---|
| V_DC nominal | 800 V | 650–900 V operating |
| V_DC_max | 950 V | regen surge clamp |
| P_continuous | 250 kW (335 hp) | shaft, 65 °C coolant inlet |
| P_peak (30 s) | 350 kW (469 hp) | shaft, single-pulse |
| I_phase_rms | 500 A_rms | line current at peak |
| I_phase_peak | 707 A | sinusoidal crest |
| f_sw | 16 kHz | space-vector PWM |
| η_peak | 99.0 % | at 50 % rated power, 800 V |
| Galvanic isolation | 4 kV DC / 60 s | HV to control-side |
| T_j_max (SiC die) | 175 °C | 150 °C steady-state derate |
| T_op ambient | −40 to +85 °C | underhood / underfloor BEV |
| Storage T | −40 to +105 °C | parked vehicle |
| MTBF (Telcordia SR-332) | 100 000 h | mission-profile weighted |
| Mass | < 12 kg | target |
| Volume | < 8 L | target |
| IP rating | IP67 | wash + 1 m submersion 30 min |
| EMC | CISPR 25 Class 5 | conducted + radiated |
| Func. safety | ASIL-D | ISO 26262 |
| Quality | IATF 16949 | production |
| Coolant | 50/50 WEG | 65 °C inlet, 2 L/min |
| Cybersecurity | ISO/SAE 21434 | secure-boot MCU |
The standards-and-codes stack governing these numbers is consolidated in engineering-codes — ISO 26262, IATF 16949, ISO/SAE 21434, CISPR 25, ISO 16750, IEC 60664, AEC-Q101, AEC-Q200, and UN-ECE R10 all apply.
3. Topology selection
Chosen: 3-phase, 2-level voltage-source inverter (VSI) — six switches, six freewheeling diodes (intrinsic body diode of the SiC MOSFETs supplemented by co-packaged SiC Schottky for hard-commutation losses). This is the textbook B6-bridge of power-electronics (Mohan/Undeland/Robbins ch. 8).
+V_DC ─────┬───────┬───────┬─────
Q1 Q3 Q5
│ │ │
├─ U ├─ V ├─ W → motor
│ │ │
Q2 Q4 Q6
−V_DC ─────┴───────┴───────┴─────
Alternative considered: 3-level neutral-point-clamped (NPC). Lower output harmonic distortion (THD), lower dv/dt at the machine terminals (kinder to motor winding insulation, fewer common-mode currents), but 12 switches + 6 clamp diodes, more complex modulation, neutral-point balancing loop, and ≈ 30 % more gate-driver channels. At 800 V the 2-level topology with 1200 V SiC parts gives better cost / size / efficiency for ≤ 350 kW peak; NPC pays for itself above ≈ 600 kW or when the machine is sensitive to dv/dt (long cable runs, high-pole machines). Decision: stay 2-level.
Alternative also considered: T-type 3-level. Three-switch leg, one bidirectional middle device. Better than NPC for medium voltage but the 1200 V SiC parts already fit the 800 V bus with comfortable derating, so we don’t need to chase it.
See power-conversion-topologies (cross-link from power-electronics) for the full topology decision tree.
4. SiC MOSFET selection
The switching device is the single biggest lever on inverter mass, efficiency, and cost. SiC wins over Si IGBTs at 800 V because:
- Higher T_j_max (175 °C vs 150 °C) → smaller cold-plate, smaller pump.
- Lower switching loss → push f_sw from 8 kHz to 16 kHz without thermal penalty → smaller DC-link cap, smaller output filter, quieter motor.
- No tail current → cleaner turn-off, less ringing, less EMI.
- Lower R_DSon at junction temperature for a given die area.
Selected: Wolfspeed CAB450M12XM3. Half-bridge SiC power module, 1200 V, 450 A continuous, R_DSon = 1.1 mΩ at 25 °C (≈ 2.0 mΩ hot at 150 °C), 7 dies per switch position paralleled internally, XM3 footprint (53 × 80 × 19 mm), silicon-nitride AMB ceramic substrate, integrated NTC. Three modules form the B6 bridge. AEC-Q101 qualified.
Alternatives benchmarked:
- Infineon HybridPACK Drive HP-Drive-100kW (FS03MR12A6MA1B). Integrated 3-phase module — single part, simplest bus-bar, but locks you to Infineon’s pinout and 1.4 mΩ on-resistance. Excellent for ≤ 250 kW; tight for 350 kW peak without parallel modules.
- onsemi NXH200N120L2Q0. F4 package, half-bridge, 1200 V, 200 A. Two modules per phase (six total). Lower per-module cost, more bus-bar complexity. Picked this for the cost-down V2.
The semiconductor material and package taxonomies — SiC vs Si vs GaN, AMB vs DBC substrates, sintered-silver vs solder die attach — are in semiconductor-materials and semiconductor-packages.
5. First-cut sizing and loss budget
DC-link current (continuous):
I_DC = P / V_DC = 250 000 / 800 = 312.5 A
Phase current (continuous, η ≈ 0.99, PF ≈ 0.95):
I_phase = P / (√3 · V_LL · η · PF) — but V_LL depends on modulation index.
For space-vector PWM at modulation index m = 0.9, V_LL_rms ≈ m · V_DC · √3/(2√2) = 0.9 · 800 · 0.612 = 441 V_rms phase-to-phase.
I_phase = 250 000 / (√3 · 441 · 0.99 · 0.95) = 348 A_rms (round to 350 A_rms continuous).
Peak (350 kW for 30 s): scale by 350/250 = 1.4 → 490 A_rms (round to 500 A_rms = our spec headline).
Per-FET conduction loss (continuous, hot R_DSon = 2.0 mΩ):
P_cond = I_phase² · R_DSon · d_avg
Average duty per FET ≈ 0.5, but conduction occurs while it carries current, so effective P_cond ≈ I_rms² · R_DSon = 350² · 2.0e−3 = 245 W per FET.
Per-FET switching loss at 16 kHz:
E_on + E_off per switch event ≈ 4 mJ at 400 A, 800 V (Wolfspeed datasheet, T_j = 150 °C). At f_sw = 16 kHz:
P_sw = E_sw · f_sw = 4e−3 · 16 000 = 64 W per FET.
Total per-FET loss: 245 + 64 = 309 W. Six FETs in the bridge:
P_total ≈ 1 850 W (1.85 kW).
Efficiency:
η = 1 − P_loss / P_out = 1 − 1850 / 250 000 = 99.26 %.
That clears our 99.0 % spec with margin. At 350 kW peak, losses scale as I², so peak loss ≈ 1850 · (500/350)² = 3 770 W. The cold-plate must shed both operating points; the 30-s pulse uses module + baseplate thermal mass to absorb the difference.
These are first-cut numbers from power-electronics-loss-analysis — final values come from PLECS or PSIM thermal simulation with the actual mission profile (WLTC + RDE + launch).
6. Gate driver
A power module is only as good as the gate driver feeding it. SiC needs:
- High peak current (6–10 A) to swing the gate fast through Miller plateau.
- Negative off-bias (typically −5 V) to keep the FET firmly off against high dv/dt-induced parasitic turn-on (Miller-clamp also helps).
- Galvanic isolation ≥ V_DC + safety margin → 5 kV-class isolation barrier.
- DESAT detection for hard-shoot-through and motor-fault protection within ≤ 2 µs.
- Safe-state input (independent of MCU) for the ASIL-D shutdown path.
Selected: Infineon 1EDI60I12AF — coreless-transformer isolation, 4 kV_rms working voltage / 8 kV impulse, 6 A peak source / sink, integrated DESAT, active Miller-clamp, two-level turn-off (soft-shutdown at fault).
Isolated bias supply: Recom RKZ-2415D. ±15 V at 2 W, 5.2 kV isolation, mounted one-per-FET on the gate-driver daughter-board. For ASIL-D we use two independent supplies per high-side switch (one for the driver, one for the DESAT monitor) — this lets us reach the single-point fault metric (SPFM) ≥ 99 % demanded by ISO 26262.
Phase-current sense for the loop: Texas Instruments INA241B1 isolated current- sense amp, 8 kV reinforced isolation, ±48 V common-mode, 200 kHz bandwidth, fed from a 1 mΩ in-phase shunt. See op-amp-variants for the isolated-amp family vs Hall sensor trade-off.
7. DC-link capacitor
The DC link absorbs the commutation ripple current the battery cannot supply fast enough. At 16 kHz / 500 A_rms phase / 0.9 modulation, the calculated DC-link ripple current is ≈ 200 A_rms (Kolar, “Calculation of the passive and active component stress in three-phase PWM-VSI”, IEEE 2008).
Required capacitance to hold ΔV_DC ≤ 10 V peak-to-peak:
C ≥ I_ripple_pk / (f_sw · ΔV) = 283 / (16 000 · 10) = 1.77 mF.
Selected: Vishay MKP1848C series, metallized-polypropylene (PP) film, 1200 V_DC, 100 µF each, AEC-Q200 qualified. 20 in parallel = 2 000 µF, with ESR ≈ 5 mΩ / 10 kHz per cap → bank ESR ≈ 0.25 mΩ. Self-resonance > 50 kHz.
Why PP film and not electrolytic? Film caps:
- Self-heal after a partial breakdown (the metallization burns clear).
- Negligible ageing vs aluminum electrolytic’s 2 000-h-at-105 °C wear-out.
- Low ESR at high frequency — electrolytic would need 40× capacitance to match.
- Tolerate 90 °C hotspot continuous.
Mounting: vertical orientation with the laminated bus-bar landing on the cap-bank’s top terminals so the commutation loop area is minimized — see passive-components for the polypropylene-film cap family.
8. PCB and laminated bus-bar
Two assemblies:
- Power deck — laminated copper bus-bar (positive plate / negative plate separated by 50 µm Kapton (polyimide) insulator). Cu 4 × 30 mm cross-section per plate, current density ≈ 4 A/mm² at 500 A. Plates are stacked then resin-impregnated. Loop inductance L_σ ≈ 15 nH across each half-bridge — critical: every nH lifts V_DS overshoot at switching by L · di/dt, and SiC dv/dt at 50 V/ns hits V_DS_breakdown fast.
- Gate-drive board — separate FR-4 PCB carrying gate drivers, sense electronics, DESAT comparators, and the isolated bias supplies. Daughters to the power deck via short, twisted-pair gate harnesses.
Substrate under the SiC dies (inside the module): AlN-DBC (aluminum- nitride direct-bonded copper). AlN thermal conductivity 170 W/m·K, CTE matches the SiC die well. Alternative for the gate-driver board (which dissipates only a few watts): Bergquist HPL-03015 IMS (insulated metal substrate, 1.5 W/m·K), but in this design we keep gate-drive on standard FR-4 and reserve IMS / DBC for the inside of the module.
Substrate trade-offs (PCB FR-4 → IMS → DBC → AMB) live in pcb-substrates.
Spacing & creepage: 800 V working voltage in Pollution Degree 2, Material Group I (CTI ≥ 600), per IEC 60664-1: creepage ≥ 5.6 mm, clearance ≥ 4 mm. We use 8 mm creepage on the power deck for margin.
9. Thermal management
Heat load to dissipate: 1.85 kW continuous, 3.77 kW pulse-peak.
Coolant loop: 50/50 water-ethylene-glycol (WEG) at 65 °C inlet, 2 L/min (0.53 gpm) flow. With c_p ≈ 3.4 kJ/kg·K and ρ ≈ 1.05 kg/L:
ΔT_water = P / (ṁ · c_p) = 1850 / (2/60 · 1.05 · 3400) = 15.5 K
→ outlet ≈ 80 °C, comfortably below the loop’s 95 °C overtemp setpoint.
Cold-plate construction: aluminum 6061-T6 base (cast then CNC-finished), internal pin-fin array under each module footprint, brazed cover plate. Flow distribution validated by CFD (k-ω SST) — see heat-transfer-correlations for the pin-fin Nu / pressure- drop correlations (Žukauskas, Idelchik).
Thermal stack-up (per FET die, junction to coolant):
| Layer | R_θ (K/W) |
|---|---|
| SiC die → AMB top Cu | 0.10 |
| AMB top Cu → AlN → AMB bot Cu | 0.15 |
| AMB → solder → baseplate | 0.05 |
| Baseplate → TIM (50 µm indium foil) → cold-plate | 0.15 |
| Cold-plate fin → coolant (h ≈ 8 000 W/m²K) | 0.05 |
| Total per FET | 0.50 K/W |
At 309 W per FET continuous: ΔT_jc + ΔT_ca = 309 · 0.50 = 155 K → T_j = 65 + 155 = 220 °C ← too hot. So we parallel two modules per phase (six modules total, twelve FET-equivalents in the bridge), halving per-die loss and landing T_j ≈ 130 °C continuous, 170 °C peak — inside the 175 °C limit.
(This is exactly the trade Wolfspeed/Infineon walked when they sized their own ≥ 250 kW reference designs. Always check thermals before locking the module count.)
TIM: indium foil 50 µm, k = 86 W/m·K, vs silicone grease (5 W/m·K). Indium is expensive but compresses to fill voids, doesn’t pump out over thermal cycles, and survives the 200 000-cycle automotive mission profile. Refrigerant / coolant chemistry (WEG, propylene-glycol, R-1233zd) is catalogued in refrigerants.
10. Current sensing and protection
Per-phase, in-line shunt: Vishay WSLP3921 1 mΩ, 4-terminal Kelvin sense, 3 W continuous, AEC-Q200. Fed into TI AMC1311 isolated ΔΣ ADC (16-bit, 78 kSPS, ±2 V_in, 7 kV reinforced isolation). One per phase → three channels into the MCU’s HRPWM-trip comparator and FOC loop.
Coarse / fault sense: LEM HASS 100-S open-loop Hall current transducer per phase (vehicle-side fault detection, 100 kHz BW, ±100 A range). Reports to the vehicle CAN diagnostic frame; not in the FOC loop.
Module DESAT: built into the 1EDI60I12AF gate driver. Trips if V_DS remains > 7 V after 2 µs of “on” command → soft-shutoff path activates, SAFE_STATE pin asserts.
NTC for module temperature: Vishay NTCG163KF 10 kΩ at 25 °C, embedded in module substrate; gives the MCU a real-time junction-temperature estimate. At T_j > 160 °C the FOC loop derates I_q linearly to zero by 175 °C.
DC-link overvoltage clamp: Littelfuse SP3T-series TVS across the DC bus, fires above 950 V. Catches load-dump and regen surge.
The protection ladder (DESAT → over-current → over-temperature → SAFE_STATE → vehicle-bus fault) is mapped against the ISO 26262 hazard-analysis-and-risk- assessment (HARA) deliverable.
11. Control algorithm
Field-Oriented Control (FOC) on the rotating d-q reference frame. The motor is an 8-pole IPM-PMSM with embedded resolver (variable-reluctance type). Control loop runs synchronously with PWM at 16 kHz.
Loop structure (per Krishnan 2009, “PMSM and Brushless DC Motor Drives”):
┌──── i_q* ──→ PI ──→ V_q* ──┐
torque* ┤ ├─→ inverse Park → SV-PWM → gate signals
└──── i_d* ──→ PI ──→ V_d* ──┘
↑ ↑
i_d, i_q (Park transform of i_a, i_b, i_c)
↑
resolver → AD2S1210 → θ_e
Steps each 62.5 µs (1/16 kHz):
- ADC samples phase currents (AMC1311, sample-and-hold synced to PWM midpoint to suppress switching noise).
- Clarke transform: (i_a, i_b, i_c) → (i_α, i_β).
- Park transform: (i_α, i_β, θ_e) → (i_d, i_q).
- Outer torque loop maps desired torque → i_d*, i_q* references (look-up table baked from motor flux maps).
- Inner current PI controllers produce V_d*, V_q*.
- Inverse Park → (V_α*, V_β*).
- Space-vector PWM modulator generates the three duty cycles, applied via the high-resolution PWM unit on the MCU.
Field-weakening above base speed (≈ 4 000 rpm): push −i_d into the d-axis to counter the back-EMF, extending speed range to 20 000 rpm. The MTPA → MTPV trajectory is pre-computed against motor flux-map and stored in flash.
MCU: Infineon AURIX TC397 — TriCore, 6 cores, lockstep pairs, hardware ASIL-D, hardware safety extensions (HSM/HSE), 16 MB flash, multi-channel HRPWM with dead-time and trip, dedicated EMC-resistant ADCs, AEC-Q100 Grade-1 (−40 °C to +150 °C T_j).
Resolver-to-digital: Analog Devices AD2S1210 — 10-to-16-bit resolver-to- digital converter, supports up to 15 krpm electrical with 10 kHz tracking BW.
The FOC math, Clarke/Park transforms, space-vector modulation, and field- weakening trajectories all consolidate to control-algorithms under the motor-drive subsection.
12. Software stack
- Operating system: AUTOSAR Classic R23-11, real-time, statically scheduled tasks. The traction loop sits in a 62.5 µs OS task pinned to one TriCore.
- Process maturity: ASPICE Level 3 (Automotive SPICE) — managed
- measured + established process for SWE.1 through SWE.6.
- Functional safety: ISO 26262 ASIL-D end-to-end — independent FFI (freedom from interference) between QM and ASIL-D partitions, lockstep-CPU verification, RAM/Flash ECC, watchdog with question-answer protocol.
- Cybersecurity: ISO/SAE 21434 lifecycle — TARA, secure-boot signed by the HSM, encrypted CAN-FD with SecOC, OTA update authentication.
Compiler: Tasking VX-toolset (qualified per ISO 26262 part 8). Static analysis via PolySpace + Cantata (MC/DC coverage to 100 %). Model-Based-Development for the FOC loop in Simulink, autocode via Embedded Coder with TargetLink for ASIL-D-qualified code generation.
13. Communications
Primary: CAN-FD ISO 11898-1, 5 Mbit/s data phase, with SecOC authentication. Carries torque commands from VCU, fault reports, diagnostics (UDS ISO 14229).
Optional: Automotive Ethernet 100BASE-T1 (IEEE 802.3bw), single-pair unshielded twisted, for high-bandwidth diagnostics, OTA updates, and debug-port streaming. Used during EOL test and field-service.
Connector for the CAN/Ethernet bus: Yazaki YESC sealed automotive series. HV connectors and signal connector families catalog at connector-families.
14. Materials
| Function | Material | Spec |
|---|---|---|
| Housing | Al die-cast A380 | UNS A03800, HPDC, 165 MPa UTS |
| Cover plate | Al 6061-T6 | machined |
| Cooling tubes | Al 3003 brazed | controlled-atmosphere braze |
| Bus-bar | Cu C11000 (ETP) | 99.9 % Cu, 58 MS/m |
| Bus-bar plating | Tin-over-nickel | corrosion + solderability |
| Bus-bar insulation | 50 µm Kapton (polyimide) | UL94 V-0 |
| Module die-attach | Sintered silver (Heraeus mAgic) | 250 °C process, ≥ 230 MPa shear |
| Module case fill | Silicone gel (Sylgard 184 / Wacker SilGel 612) | partial-discharge < 5 pC at 4 kV |
| Top seal | EPDM O-ring | Shore 70 A, −40 to +150 °C |
| TIM | Indium foil 50 µm | k = 86 W/m·K |
Aluminum alloy selection (A380 vs A356 vs 6061, HPDC vs sand vs forging) is in aluminum-alloys. Copper alloy (C11000 vs C10100 vs C15500) lives in copper-alloys. Elastomeric seal family (EPDM, FKM, VMQ, HNBR — temperature/fluid compatibility) in seals-taxonomy. Polymer taxonomy (PA66, PBT, PPS, PEEK, polyimide film, silicone gel) in polymers-taxonomy.
15. Connectors
| Path | Part | Rating |
|---|---|---|
| HV DC input (battery) | Aptiv HVA800 or Rosenberger HV-Box | 800 V / 250 A / IP67 |
| HV phase output (3×) | Amphenol PowerLok PL082 | 800 V / 350 A / IP67 / HVIL |
| Coolant in/out | SAE J2044 quick-connect | 5 bar |
| CAN-FD / supply | Yazaki YESC | 12-pos sealed automotive |
| Resolver / sense | TE Deutsch DT04-12 | 12-pos sealed |
| Service / debug | TE AMPSEAL 16-pos | sealed, removable plug |
HV connectors all include HVIL (high-voltage interlock loop) so the BMS can detect a disconnected connector and de-energize the bus within 5 s. See connector-families.
16. EMC
Two domains: conducted (DC-link / 12 V supply / CAN) and radiated (motor phase cables radiate into 30 MHz–1 GHz).
Target: CISPR 25 Class 5 (most stringent automotive level) + ISO 11452 immunity (200 V/m radiated, BCI 200 mA).
Filter chain on the DC input:
- Common-mode choke (CMC): Vacuumschmelze nanocrystalline core, 10 µH common-mode, 1 µH differential, 500 A_rms saturation.
- Y-capacitors to chassis: 2 × 1 µF Wima Y-class film, 1 000 V_DC, AEC-Q200.
- X-capacitor across DC bus: 10 µF PP film (separate from main DC-link bank) to attenuate differential-mode ripple before the bank.
Phase-cable EMC: triaxial shielded cables, shield landed 360° at both the inverter and motor housings (NOT pigtailed — pigtails radiate). Cable resonance managed by 100 nF feed-through caps at the inverter housing penetration.
PCB EMC: return-current path on adjacent layer directly under every signal trace; gate-drive board has continuous ground plane; star-grounding at the isolated bias supply common.
EMC design guidance and pre-compliance test methods cross-link to pcb-design and emc-emi-design.
17. Verification and testing
Per-build tests:
| Test | Standard | Acceptance |
|---|---|---|
| Dyno continuous | internal | 250 kW · 1 h at 65 °C inlet |
| Dyno pulse | internal | 350 kW · 30 s, T_j ≤ 175 °C |
| Mechanical shock | ISO 16750-3 | 50 g / 6 ms, 3 axes, 3 pulses |
| Vibration random | ISO 16750-3 | 27.8 m/s² RMS, 22 h/axis |
| Thermal shock | ISO 16750-4 | −40 → +125 °C, 1 000 cycles |
| Humidity | ISO 16750-4 | 95 % RH / 65 °C, 10 d |
| Ingress protection | IEC 60529 | IP67 (1 m, 30 min) + IPX9K pressure-wash |
| HV isolation | IEC 60664-1 | 4 kV impulse 1.2/50 µs, no flashover |
| HV dielectric | IEC 60664-1 | 2.5 kV_rms / 60 s, leakage < 1 mA |
| Conducted emissions | CISPR 25 | Class 5 |
| Radiated emissions | CISPR 25 | Class 5, 150 kHz–2.5 GHz |
| BCI immunity | ISO 11452-4 | 200 mA, 1 MHz–400 MHz |
| Radiated immunity | ISO 11452-2 | 200 V/m, 200 MHz–2 GHz |
| ESD | ISO 10605 | ±25 kV air / ±15 kV contact |
| Fast pulse | ISO 7637-2 | pulses 1–7 |
| Salt-spray | ISO 9227 | 96 h NSS |
Reliability demonstration:
- Power-cycling (PCT): 100 000 cycles at ΔT_j = 100 K — checks die-attach and wire-bond / solder-joint fatigue.
- Thermal-cycling (TCT): 1 000 cycles −40 → +125 °C — checks cold-plate TIM and substrate.
- HALT/HASS for early-life screening.
- Telcordia SR-332 prediction validated against accelerated-life data.
18. Manufacturing
Power module assembly (done by Wolfspeed; replicated for in-house V2):
- Die-attach: sintered silver (Heraeus mAgic) at 250 °C / 10 MPa / 60 s. Shear strength ≥ 230 MPa, T_melt > 600 °C — beats SAC305 solder (220 °C melt) for high-T_j SiC. See joining-taxonomy (sintered-Ag entry).
- Wire-bonding: aluminum heavy wire 400 µm or copper-clad-Al ribbon for the gate and source bonds; AlN-DBC substrate.
- Substrate-to-baseplate: SAC305 solder reflow at 250 °C peak.
- Encapsulation: Wacker SilGel 612 silicone gel poured, vacuum-degassed, cured 60 min at 100 °C.
Gate-driver PCB: standard FR-4 with SAC305 lead-free reflow, automated optical inspection (AOI) + in-circuit test (ICT) + functional test (FCT).
Housing:
- High-pressure die-cast (HPDC) A380 — see casting-processes for HPDC vs LPDC vs gravity vs sand trade-offs.
- Post-machining of mating surfaces, O-ring grooves, and threaded inserts (Heli-Coil for M6 cooling-line nipples).
- Welding where required: GMAW on aluminum cooling-loop tubes — see welding-processes for GMAW vs GTAW vs FSW.
Final assembly: automated cell with vision-guided robot, torque-controlled fasteners (DC nutrunners with angle + torque monitoring), helium leak test on the coolant path (< 1e−5 mbar·L/s), HV-isolation test, full-power functional test on dyno.
Production volume: 100 000 units/year, line takt 32 s, OEE target 85 %.
19. Cost target (qty 100 000)
| Item | Cost (USD) |
|---|---|
| 3 × SiC power module (CAB450M12XM3 equivalent at qty 100 k) | 800 |
| 3 × gate-driver assemblies (1EDI60I12AF + RKZ-2415D + INA241B1) | 50 |
| DC-link cap bank (20 × Vishay MKP1848C) | 80 |
| Aluminum cold-plate (HPDC + finish) | 40 |
| Laminated Cu bus-bar | 30 |
| Aluminum housing (HPDC A380 + machining + seals) | 35 |
| Infineon AURIX TC397 MCU + memory | 25 |
| HV + signal connector set (PowerLok + Yazaki + Deutsch) | 60 |
| Encapsulant + TIM + miscellaneous materials | 10 |
| Assembly + end-of-line test (32 s takt) | 100 |
| BOM total | ≈ 1 230 |
OEM benchmark (Tesla Plaid, Lucid Air, Porsche Taycan): USD 1 500 – 2 000 per inverter at OEM volumes. Our design lands at the lean end of that band by choosing a single Wolfspeed module family + AURIX TC397 + qty-volume PP-film cap bank. Cost-down V2 with onsemi NXH200N120L2Q0 modules targets ≈ USD 950.
20. Schedule (kick-off to start-of-production)
| Phase | Duration | Deliverables |
|---|---|---|
| Concept + Si/module specification | 3 months | architecture frozen, module BOM, supplier LoIs |
| Hardware design + prototypes | 4 months | PCB rev-A, module integration, EVT bench |
| Integration + ASIL-D safety case + EMC pre-comp | 6 months | DVT, ISO 26262 work-products, CISPR pre-scan, software ASPICE 3 |
| Durability + dyno + IATF audit | 6 months | PCT/TCT, IATF 16949 surveillance, mission-profile equivalent on dyno |
| PPAP + ramp + SOP | 3 months | PPAP submission, OEM customer sign-off, line at 100 k/yr |
| Total | 22 months | kickoff → start-of-production |
This is aggressive but feasible if the SiC module supplier is co-located (Wolfspeed Mohawk Valley / Infineon Villach) and AURIX firmware reuses a prior ASIL-D base. Add 4–6 months if the SiC module is custom-packaged.
21. Cross-references and citations
Tier-3 notes referenced (every paragraph wikilinks):
- power-electronics — topology, B6-bridge, modulation
- engineering-codes — standards catalog (ISO 26262, IATF, CISPR, ISO 16750, IEC 60664, AEC-Q101/Q200)
- power-conversion-topologies — 2-level vs 3-level NPC vs T-type trade tree
- semiconductor-materials — SiC vs Si vs GaN
- semiconductor-packages — XM3, HybridPACK, F4, AlN-DBC, AMB
- op-amp-variants — isolated current-sense INA241, AMC1311
- passive-components — polypropylene film DC-link cap
- pcb-substrates — FR-4 vs IMS vs DBC vs AMB
- heat-transfer-correlations — Žukauskas pin-fin, Idelchik flow-loss
- refrigerants — water-ethylene-glycol coolant
- power-electronics-loss-analysis — conduction + switching loss models
- connector-families — Aptiv HVA800, Amphenol PowerLok, Yazaki YESC, Deutsch DT
- aluminum-alloys — A380 die-cast, 6061-T6
- copper-alloys — C11000 ETP bus-bar copper
- seals-taxonomy — EPDM O-ring chemistry / temperature
- polymers-taxonomy — Kapton, SilGel, Sylgard 184
- welding-processes — GMAW aluminum tubing
- casting-processes — HPDC Al housing
- joining-taxonomy — sintered-Ag die attach, SAC305
- emc-emi-design — CISPR 25 design rules, CMC, Y-caps
- pcb-design — return-path layout, gate-drive PCB rules
- control-algorithms — FOC, Clarke/Park, SV-PWM, MTPA/MTPV
- motion-control — motor-drive perspective
External standards (normative):
- ISO 26262:2018 Road vehicles — Functional safety (ASIL classification)
- IATF 16949:2016 Quality management for automotive production
- ISO/SAE 21434:2021 Road vehicles — Cybersecurity engineering
- ISO 16750 (parts 1–5) Environmental conditions and testing for electrical and electronic equipment in road vehicles
- IEC 60664-1:2007 Insulation coordination for equipment within low-voltage systems
- CISPR 25:2021 Vehicles, boats, internal combustion engines — Radio disturbance characteristics
- ISO 11452 (parts 2, 4) Road vehicles — Electrical disturbances by narrow- band radiated electromagnetic energy
- ISO 11898-1 Road vehicles — CAN-FD data link layer
- AEC-Q101 Failure mechanism based stress test qualification for discrete semiconductors (covers SiC MOSFETs)
- AEC-Q200 Stress test qualification for passive components
- AUTOSAR Classic Platform R23-11 Software architecture for automotive ECUs
- Automotive SPICE (ASPICE) v3.1 Process Reference Model for software development
- SAE J1772 / J2954 / J3068 EV charging interfaces (out-of-scope here but inverter must coexist with on-board charger)
Datasheets:
- Wolfspeed CAB450M12XM3 SiC MOSFET half-bridge module (1200 V / 450 A)
- Infineon 1EDI60I12AF isolated SiC gate driver
- Texas Instruments AMC1311 reinforced isolated ΔΣ ADC
- Texas Instruments INA241 isolated current-sense amplifier
- Vishay MKP1848C DC-link PP-film capacitor
- Vishay WSLP3921 1 mΩ Kelvin shunt
- LEM HASS 100-S Hall-effect current transducer
- Analog Devices AD2S1210 resolver-to-digital converter
- Infineon AURIX TC397 automotive MCU
- Recom RKZ-2415D isolated DC-DC bias supply
- Vacuumschmelze nanocrystalline common-mode choke cores
- Wima Y-class safety capacitors
- Heraeus mAgic sintered-silver paste
Textbooks:
- N. Mohan, T. M. Undeland, W. P. Robbins, Power Electronics: Converters, Applications, and Design, 3rd ed., Wiley, 2003 — Chapter 8 (PWM VSI), Chapter 27 (motor drives).
- R. Krishnan, Permanent Magnet Synchronous and Brushless DC Motor Drives, CRC Press, 2009 — Chapter 9 (FOC on IPMSM), Chapter 10 (field-weakening).
- J. W. Kolar et al., “Calculation of the Passive and Active Component Stress of Three-Phase PWM Converter Systems with High Pulse Rate,” IEEE PESC, 2008 — DC-link ripple-current formulas.
- T. M. Jahns, “Motion Control with Permanent-Magnet AC Machines,” Proceedings of the IEEE, vol. 82, no. 8, 1994 — IPM control fundamentals.
- A. M. Hava, R. J. Kerkman, T. A. Lipo, “Carrier-based PWM-VSI Overmodulation Strategies: Analysis, Comparison, and Design,” IEEE Trans. Power Electron., 1998 — SV-PWM overmodulation.
- Wolfspeed AN0019, “Comparing SiC MOSFETs to Si IGBTs in Traction Drives,” 2022.
End of walkthrough. Continuing companion walkthroughs cover the 22 kW on-board charger (separate doc), the BMS, and the integrated drive unit (gearbox + motor + inverter as one assembly).