Operational Amplifiers
See also (Tier 3 family index): Op-Amp Variants
1. At a glance
An operational amplifier (“op-amp”) is a high-gain differential voltage amplifier with two inputs — non-inverting (+) and inverting (−) — and one single-ended output. It is the most general-purpose analog active building block in electronics: a single part, wrapped in a passive feedback network, can be configured as a voltage amplifier, buffer, summer, subtractor, integrator, differentiator, active filter, precision rectifier, voltage-to-current converter, oscillator, comparator (sometimes), regulator error-amp, or front-end for almost any sensor. Every modern electronic system — every phone, motor controller, audio interface, ECG, weigh-scale, spectrometer, instrumentation rack — contains dozens.
Op-amps started life in the 1940s as vacuum-tube modules used in analog computers to perform operations (addition, integration, multiplication-by-constant) on continuous voltages — hence the name. The first practical IC op-amp, Fairchild’s µA709, shipped in 1965; Bob Widlar’s follow-up µA741 (1968) added internal compensation and short-circuit protection and became the textbook part. Modern equivalents are commodity: an LM358 dual op-amp costs under USD 0.10 and a MCP6002 CMOS rail-to-rail dual is in the same range.
The engineering discipline of op-amp design is mastering the gap between ideal-op-amp pedagogy and real-part datasheet behaviour. The undergraduate model — infinite gain, infinite input impedance, zero output impedance, instantaneous response — is enough to derive every textbook closed-loop transfer function but predicts none of the practical failure modes: stability, offset, drift, finite gain-bandwidth, slew-limited large-signal response, common-mode range violations, output saturation short of the supplies, capacitive-load oscillation, phase reversal, or input bias-current voltage errors. Most “this circuit doesn’t work” debug sessions reduce to one of those.
This note covers the ideal model, where it breaks, the common closed-loop topologies, the parameters that drive part selection, and a curated set of real parts indexed by what they are good at.
2. First principles
The ideal op-amp
An ideal op-amp obeys:
V_out = A_OL · (V+ − V−)
with:
- Open-loop voltage gain A_OL → ∞
- Input resistance R_in → ∞ (no current into either input)
- Output resistance R_out → 0 (can drive any load)
- Bandwidth → ∞ (no frequency roll-off)
- Input offset voltage V_os = 0 (V_out = 0 when V+ = V−)
- Zero noise, zero common-mode error, infinite supply rejection
- Output swings rail-to-rail with no headroom
Two golden rules under negative feedback flow directly from A_OL → ∞:
- No current flows into either input. A consequence of R_in → ∞.
- The two inputs sit at the same voltage (V+ = V−). For any finite V_out, the differential input must be V_out/A_OL → 0 in the limit. This is the virtual short; if the (+) input is grounded the (−) input is held at a virtual ground (zero volts but not actually tied to ground).
Almost every linear op-amp circuit is solved by writing KCL at the inverting input under rule (1), substituting the (+) node voltage for the (−) node voltage under rule (2), and solving for V_out. The transfer function then depends only on the external passive network — the op-amp itself contributes nothing but a high-gain error amplifier that forces its inputs to equality.
Internal structure of a real op-amp
A bipolar voltage-feedback op-amp such as the µA741 has three internal stages:
- Input differential pair. Two matched BJTs (NPN or PNP) or two MOSFETs sharing a tail current source. Converts the differential input voltage to a differential current. This stage sets input bias current, input offset voltage, voltage noise density, common-mode range, and CMRR. (See
[[Engineering/semiconductor-devices]]for the differential-pair physics.) - High-gain second stage. Typically a common-emitter (BJT) or common-source (MOSFET) transistor loaded by a high-impedance current mirror, optionally cascoded. Contributes most of the DC open-loop gain (~80–120 dB).
- Class-AB output stage. Complementary emitter-follower (NPN/PNP push-pull) or common-source (CMOS) buffer that sources and sinks load current with low output impedance and low quiescent dissipation.
A compensation capacitor (typically 10–30 pF, the “Miller cap” C_c across the second stage) deliberately places the dominant pole at very low frequency (often 1–10 Hz). The open-loop response rolls off at −20 dB/decade from there until it crosses 0 dB at the gain-bandwidth product GBP, where higher-frequency poles introduce extra phase shift. Internal compensation guarantees unity-gain stability at the cost of available bandwidth: a uncompensated op-amp (sometimes called “decompensated”, e.g. OPA637) has much higher GBP but is only stable for closed-loop gains above some minimum (typically ≥ 5).
Negative feedback in one paragraph
If the open-loop gain is A_OL and a fraction β_fb of V_out is returned to the inverting input, the closed-loop gain is:
A_CL = A_OL / (1 + A_OL · β_fb)
For A_OL · β_fb ≫ 1 (the loop gain), A_CL ≈ 1/β_fb — the closed-loop transfer function is set by the feedback network alone. The loop gain also reduces non-linearity by the same factor, lowers output impedance by the same factor, and raises the effective input impedance by the same factor. The price is bandwidth: closed-loop bandwidth = GBP × β_fb.
Stability
The loop becomes an oscillator when the loop gain magnitude exceeds 1 with 180° of phase shift. A real op-amp has multiple internal poles, so phase shift accumulates with frequency. Internally compensated parts are designed for at least 45° phase margin at unity loop gain; in practice 60° is the design target. External capacitive load adds a pole after the output stage that can erode this — see section 7c (capacitive-load oscillation).
3. Practical math / design equations
In every equation below the op-amp is assumed to operate in its linear region (output not clipping, input common-mode in range, frequency well below GBP).
Inverting amplifier
Non-inverting input grounded. Input signal drives R_in to the inverting input; feedback resistor R_f from output back to inverting input.
V_out / V_in = − R_f / R_in
Input impedance seen by the source is R_in (because the inverting input is a virtual ground). Gain magnitude can be any value, including less than 1 (attenuator). Phase is inverted (180°).
Non-inverting amplifier
Signal drives the non-inverting input directly; feedback divider R_f (output to inverting input) and R_g (inverting input to ground).
V_out / V_in = 1 + R_f / R_g
Gain is always ≥ 1; you cannot attenuate with this topology. Input impedance is the op-amp’s own input impedance (very high). Phase is non-inverted.
Voltage follower (unity-gain buffer)
Output tied directly to inverting input. Gain = 1, phase non-inverted, input impedance very high, output impedance very low. The canonical impedance-converter used to drive low-impedance loads from high-impedance sources (sensors, references, signal chains).
Summing amplifier
Multiple input branches R_1, R_2, … all drive the same virtual-ground inverting input through their own resistors; common feedback resistor R_f.
V_out = − R_f · (V_1/R_1 + V_2/R_2 + … + V_N/R_N)
Each channel can have independent gain by choice of its input resistor. Used for audio mixing, weighted-sum DACs, control loops adding multiple correction signals.
Difference amplifier (single-op-amp subtractor)
Four resistors: R_1 from V_1 to (−), R_f from output to (−), R_2 from V_2 to (+), R_g from (+) to ground.
When matched such that R_f/R_1 = R_g/R_2:
V_out = (R_f / R_1) · (V_2 − V_1)
The CMRR of this circuit is set by resistor matching, not by the op-amp. With 1 % resistors, CMRR is limited to ≈ 34 dB regardless of how good the op-amp is. With 0.1 % matched film resistors, ≈ 54 dB. For higher precision use a monolithic difference-amp (e.g. INA106, AD629) with laser-trimmed thin-film networks, or step up to a three-op-amp instrumentation amp.
Instrumentation amplifier
Three op-amps: two non-inverting buffers (A1, A2) on the inputs, cross-coupled through a single gain resistor R_G; their outputs feed a unity-gain difference stage (A3). Gain is set by a single resistor R_G:
G = 1 + 2 · R_FB / R_G
(with R_FB the matched feedback resistors in A1 and A2). High input impedance on both inputs (unlike the single-op-amp subtractor), CMRR independent of R_G, and built-in laser-trim makes monolithic in-amps the standard for sensor front-ends. Canonical parts: AD620 (BJT, 100 dB CMRR at G = 10, V_os max 50 µV), INA826 (low power, RRO), INA333 (zero-drift, sub-µV offset).
Integrator
Inverting topology with feedback capacitor C_f replacing R_f, input resistor R_in.
V_out(t) = − (1 / (R_in · C_f)) · ∫ V_in dt + V_0
In practice the DC gain is infinite, so any input offset voltage and bias current will integrate up and saturate the output. The fix is a large resistor R_dc in parallel with C_f that bounds DC gain to R_dc/R_in (typically a factor of 10–100 above the working-frequency gain). The integrator becomes a low-pass filter below f_3dB = 1/(2π·R_dc·C_f).
Differentiator
Inverting topology with input capacitor C_in and feedback resistor R_f.
V_out(t) = − R_f · C_in · dV_in/dt
The ideal differentiator has gain rising 20 dB/decade forever, which amplifies high-frequency noise to destruction. Mandatory fix: a series resistor R_s with C_in (caps the high-frequency gain at R_f/R_s) and optionally a small capacitor C_f across R_f. Differentiators are rarely used in practice; an integrator preceded or followed by gain stages usually substitutes.
Active filters
Filters built from op-amps and RC networks avoid the bulk and parasitic losses of inductors below ~1 MHz and provide gain and isolation between stages.
- Sallen-Key low-pass / high-pass / band-pass. Two op-amps cascaded give a 4th-order filter. Component spread is moderate; Q tuning is straightforward. Q values above ~10 amplify resistor tolerance errors quickly.
- Multiple-feedback (MFB) band-pass. Single op-amp, inverting; good for moderate-Q band-pass with reasonable component values.
- State-variable. Three op-amps; simultaneously produces low-pass, high-pass, and band-pass outputs from one structure. Tuning is by single resistors; Q control is independent of frequency.
- Biquad. Four op-amps; same outputs as state-variable but each pole/zero can be independently tuned. The structure used inside most digital “analog-feel” parametric EQs.
Common filter response families:
- Butterworth — maximally flat passband, moderate phase non-linearity. Q = 0.707 per 2nd-order section.
- Bessel — maximally flat group delay (linear phase), gentlest roll-off. For waveform-preserving filtering.
- Chebyshev (Type I) — passband ripple traded for steeper roll-off. Worse phase response than Butterworth.
- Elliptic (Cauer) — ripple in both passband and stopband for steepest possible roll-off given the order. Worst phase response.
See [[Engineering/ac-analysis-three-phase]] for the underlying impedance / frequency-response machinery.
Gain-bandwidth product (GBP)
For a voltage-feedback op-amp with single-pole compensation, the closed-loop bandwidth at noise-gain G is:
f_3dB = GBP / G
where noise-gain = 1 + R_f/R_g for either inverting or non-inverting topology (the inverting amp’s noise gain is not −R_f/R_in; it is the same 1 + R_f/R_g as non-inverting, where R_g is the input resistor). Example: LM358 has GBP ≈ 1.1 MHz typ. Configured for G = 100, the small-signal −3 dB bandwidth is ≈ 11 kHz.
GBP is specified at small-signal (typically 100 mV output swing). Above the small-signal limit, slew rate takes over.
Slew rate
Slew rate SR (V/µs) is the maximum |dV_out/dt| the output stage can deliver, limited by the compensation cap charge current. For a sine wave of peak amplitude V_p and frequency f, peak rate of change is 2π·f·V_p. Setting this to SR gives the full-power bandwidth:
f_max = SR / (2π · V_p)
Example: LM358 SR ≈ 0.5 V/µs. For a ±10 V (V_p = 10 V) sine wave, f_max = 0.5 / (2π·10) = 7.96 kHz. Below this frequency the op-amp can swing 20 V_pp; above it the output triangulates and distorts. This is often the binding bandwidth limit, not GBP.
Input offset voltage
V_os is the differential input voltage that must be applied to make V_out = 0. It is amplified by the noise gain (1 + R_f/R_g) regardless of inverting vs non-inverting topology:
V_out,offset = V_os · (1 + R_f/R_g) + I_B+ · R+ − I_B− · R− + V_os,drift · ΔT · (1 + R_f/R_g)
The bias-current terms cancel if the impedances looking out of the (+) and (−) inputs are equal — a standard precision design technique.
Worked example 1 — Non-inverting amplifier with LMC6482
Design: gain G = 100, R_g = 1 kΩ, ±2.5 V single-supply (3.3 V rail). Predict small-signal bandwidth and large-signal max frequency.
Choose R_f. G = 1 + R_f/R_g → R_f = (G − 1)·R_g = 99 kΩ. Pick 100 kΩ E96 → actual G = 101.
Small-signal bandwidth. LMC6482 (TI/National, CMOS RRIO) GBP_typ = 1.5 MHz at V_S = 5 V (datasheet figure 7). f_3dB = 1.5 MHz / 101 ≈ 14.9 kHz.
Large-signal max frequency. LMC6482 SR_typ = 1.3 V/µs. With single-supply rail-to-rail output, the achievable V_pp at 3.3 V is roughly 3.2 V (output saturates ≈ 50 mV from each rail at light load) → V_p = 1.6 V.
f_max = 1.3 V/µs / (2π · 1.6 V) = 1.3e6 / (10.05) = 129 kHz.
This is well above f_3dB, so the small-signal GBP limit binds first for any signal small enough to stay below 1.6 V_p at the output. For a 100 mV input full-scale (G = 100 → 10 V_pp ideal but clipped to ~3.2 V at the rail), the design saturates on amplitude before it slew-limits on frequency.
Watch-out: V_os. LMC6482 V_os,max at 25 °C = 750 µV. Amplified by G = 101 → output offset up to 75 mV. For a 0–3.3 V output range that is ≈ 2.3 % of full scale — huge for a precision measurement. If the application is a load-cell amplifier, swap to a zero-drift part (LTC2057, V_os,max = 4 µV → 0.4 mV output offset, 50× lower).
Worked example 2 — Photodiode transimpedance amplifier
A reverse-biased BPW34 photodiode produces I_photo = 100 nA at typical indoor illumination (responsivity ≈ 0.6 A/W at 950 nm × ~170 µW/cm² × area 7.5 mm²). Design a transimpedance amplifier (TIA) to produce 10 mV per nA at the output.
Topology. Photodiode cathode to a positive bias rail (or grounded for photovoltaic mode); anode to op-amp inverting input. Non-inverting input grounded. Feedback resistor R_f from output to inverting input. V_out = I_photo · R_f.
Choose R_f. Desired transimpedance 10 mV/nA → R_f = 10 MΩ. At I_photo = 100 nA → V_out = 1.00 V.
Choose op-amp. Inverting input is a virtual ground; bias current flows through R_f and contributes V_offset = I_B · R_f. With R_f = 10 MΩ:
- LM358 (BJT input, I_B typ 45 nA) → V_offset = 450 mV. Unusable — it swamps the signal.
- TL072 (JFET, I_B typ 50 pA at 25 °C, doubles every 10 °C → ~2 nA at 70 °C) → V_offset ≈ 20 mV at 70 °C. Marginal.
- OPA381 (CMOS, I_B max 50 pA, V_os max 25 µV, GBP = 18 MHz, designed specifically for TIA) → V_offset = 0.5 mV worst case. Right answer.
- LMC6482 (CMOS, I_B typ 0.04 pA at 25 °C, V_os max 750 µV) → V_offset dominated by V_os ≈ 0.75 mV. Also acceptable, cheaper than OPA381 but lower bandwidth.
Stability — the feedback capacitor. The photodiode’s junction capacitance C_d (BPW34 ≈ 70 pF at V_R = 0, less under reverse bias) sits at the inverting input and forms a pole with R_f at the non-inverting side of the feedback loop:
f_p = 1 / (2π · R_f · C_d) = 1 / (2π · 10 MΩ · 70 pF) = 227 Hz.
This pole, combined with the op-amp’s open-loop pole, gives 180° phase shift well before the loop crossover at GBP / G — guaranteed oscillation. The fix is a small feedback capacitor C_f across R_f, sized to place a zero at the geometric mean of f_p and the GBP/AOL crossing:
C_f ≈ √(C_d / (2π · R_f · GBP)) = √(70 pF / (2π · 10 MΩ · 18 MHz))
For OPA381 (GBP = 18 MHz): C_f ≈ 0.78 pF. In practice pick the next-larger standard value (1 pF) and check stability on the bench. The TIA bandwidth is then f_TIA = 1/(2π·R_f·C_f) = 16 kHz.
Noise. Total output noise voltage density is dominated by R_f Johnson noise √(4kT·R_f) = √(4 · 1.38e-23 · 300 · 10e6) = 407 nV/√Hz at the output, integrated over the noise bandwidth. For 16 kHz bandwidth: V_n,rms ≈ 407 nV · √(16 kHz · 1.57) ≈ 64 µV — well below the 1 V signal.
Worked example 3 — Sallen-Key Butterworth low-pass filter
Design: 2nd-order Butterworth low-pass, f_c = 1 kHz, unity gain. Q = 1/√2 = 0.707.
Topology. Unity-gain Sallen-Key: input through R_1 then R_2 in series, with C_1 from the R_1–R_2 node to the output (positive feedback), and C_2 from the R_2-(+)-input node to ground. Op-amp configured as buffer (output tied to (−) input).
Equal-component design. With R_1 = R_2 = R and C_1 = C_2 = C:
f_c = 1 / (2π · R · C), Q = 0.5
This gives Q = 0.5 (overdamped), not Butterworth. To get Q = 0.707 with equal components, the op-amp gain must be set to K = 3 − 1/Q = 3 − √2 = 1.586. Alternative: keep unity gain and use unequal components.
Equal-R, unequal-C unity-gain design. Set R_1 = R_2 = R; choose C_1 and C_2 such that C_1/C_2 = 4 · Q² = 2 for Butterworth. Then:
f_c = 1 / (2π · R · √(C_1 · C_2))
Pick C_2 = 10 nF, C_1 = 20 nF. Then √(C_1·C_2) = 14.14 nF and R = 1/(2π·1000·14.14e-9) = 11.25 kΩ → pick 11.0 kΩ (E96).
Op-amp choice. For a 1 kHz cutoff the op-amp bandwidth must exceed it by at least 10× — even a 100 kHz GBP part suffices on paper. But the Sallen-Key transfer function depends on the op-amp being ideal at f_c; in practice pick GBP ≥ 100 × f_c × Q. For Q = 0.707 and f_c = 1 kHz that is 70.7 kHz; any general-purpose part (LM358 at 1 MHz, TL072 at 3 MHz, MCP6002 at 1 MHz) is fine.
4. Reference data
General-purpose op-amps (workhorse / commodity)
| Part | Tech | V_S range | GBP | SR | V_os max @ 25 °C | I_B typ | Noise (nV/√Hz @ 1 kHz) | Notes |
|---|---|---|---|---|---|---|---|---|
| LM358 / LM324 (dual / quad) | BJT, single-supply | 3–32 V | 1.1 MHz | 0.5 V/µs | 7 mV | 45 nA | 40 | The canonical cheap part. Phase-reverses on input near V−. |
| TL072 / TL074 | JFET input | ±2.25–±18 V | 3 MHz | 13 V/µs | 10 mV | 30 pA | 18 | Low-noise audio default. Not rail-to-rail. |
| MCP6002 / MCP6022 | CMOS RRIO | 1.8–6 V | 1 MHz / 10 MHz | 0.6 / 7 V/µs | 4.5 mV | 1 pA | 35 / 8.7 | MCU-friendly 3.3/5 V single-supply. |
| LMC6482 | CMOS RRIO | 3–15 V | 1.5 MHz | 1.3 V/µs | 750 µV | 0.04 pA | 22 | Higher-V CMOS RRIO. |
| LM741 | BJT, internally comp | ±5–±18 V | 1 MHz | 0.5 V/µs | 6 mV | 80 nA | — | Historic; do not use in new designs. |
| NE5532 | BJT, audio | ±3–±20 V | 10 MHz | 9 V/µs | 4 mV | 200 nA | 5 | Dual audio workhorse. |
Precision op-amps (low-V_os, low-drift)
| Part | Tech | V_os max | V_os drift max | I_B typ | GBP | Notes |
|---|---|---|---|---|---|---|
| OPA277 | BJT precision | 25 µV | 0.15 µV/°C | 1 nA | 1 MHz | 0.1 % gain accuracy. |
| OPA227 / OPA228 | BJT precision low-noise | 75 µV | 0.4 µV/°C | 10 nA | 8 / 33 MHz | 3 nV/√Hz noise. |
| LTC2057 | Chopper-stabilised | 4 µV | 0.015 µV/°C | 100 pA | 1.5 MHz | No 1/f noise; 0.5 mHz – 10 Hz noise ≈ 200 nV_pp. |
| AD8628 | Auto-zero | 5 µV | 0.02 µV/°C | 30 pA | 2.5 MHz | Effective zero 1/f noise. |
| ADA4528-1 | Zero-drift CMOS | 2.5 µV | 0.015 µV/°C | 220 pA | 4 MHz | Lowest-V_os CMOS available. |
| MAX44248 | Auto-zero CMOS dual | 6 µV | 0.03 µV/°C | 150 pA | 2 MHz | Cost-down auto-zero. |
High-speed op-amps
| Part | Topology | GBP | SR | Noise | Notes |
|---|---|---|---|---|---|
| LM7171 | Voltage feedback | 200 MHz | 4100 V/µs | 14 nV/√Hz | Ultra-high SR voltage-FB. |
| OPA847 | Voltage feedback decompensated | 3.9 GHz | 950 V/µs | 0.85 nV/√Hz | Decompensated, min stable G = 12. |
| THS3491 | Current feedback | 900 MHz | 8000 V/µs | 1.9 nV/√Hz | High-output current-FB, drives 50 Ω. |
| AD8009 | Current feedback | 1 GHz | 5500 V/µs | 1.9 nV/√Hz | Video. |
| OPA855 | SiGe BJT | 8 GHz | — | 0.98 nV/√Hz | Photodiode TIA for LIDAR. |
Low-noise op-amps
| Part | Tech | e_n @ 1 kHz | i_n @ 1 kHz | 1/f corner | Notes |
|---|---|---|---|---|---|
| LT1028 / LT1128 | BJT super-beta | 0.85 nV/√Hz | 1 pA/√Hz | 3.5 Hz | Decompensated (LT1028); unity-gain stable (LT1128). |
| AD797 | BJT | 0.9 nV/√Hz | 2 pA/√Hz | 7 Hz | Audio reference. |
| OPA1611 / OPA1612 | BJT audio | 1.1 nV/√Hz | 1.7 pA/√Hz | 1 Hz | Stereo audio with tight matching. |
| OPA211 | BJT precision low-noise | 1.1 nV/√Hz | 1.7 pA/√Hz | 10 Hz | Low-V_os companion. |
| ADA4898-1 | BJT | 0.9 nV/√Hz | 2.4 pA/√Hz | — | Lowest-noise low-distortion. |
Low-power op-amps
| Part | I_Q per channel | V_S | GBP | Notes |
|---|---|---|---|---|
| TLV2401 | 0.88 µA | 2.5–6 V | 5.5 kHz | Battery sensors. |
| LTC2063 | 1.4 µA | 1.7–5.25 V | 20 kHz | Chopper, sub-µV V_os at 2 µA. |
| MAX40006 | 0.6 µA | 1.7–5.5 V | 28 kHz | Coin-cell IoT. |
| TLV8541 | 0.55 µA | 1.7–5.5 V | 8 kHz | Ultra-low-power. |
High-voltage / high-current op-amps
| Part | V_S range | Output current | Notes |
|---|---|---|---|
| OPA547 | ±15 V to ±30 V (±60 V dual) | 750 mA cont. | Power op-amp; current limit, thermal flag. |
| ADA4870 | ±20 V | 1 A | High-bandwidth power. |
| OPA549 | ±4 to ±30 V | 8 A | Linear actuator / motor drive. |
| PA98 (Apex) | ±10 V to ±450 V | 200 mA | Piezo driver, laboratory HV. |
| OPA452 | ±15 V to ±40 V | 50 mA | ”Industrial” HV. |
Key parameters — typical industry buckets
| Parameter | ”Cheap” (LM358-class) | “Good” (TL07x, MCP) | “Precision” (OPA277, AD8628) |
|---|---|---|---|
| V_os | 2–7 mV | 0.5–10 mV | 1–25 µV |
| V_os drift | 7 µV/°C | 1–10 µV/°C | 0.02–0.5 µV/°C |
| CMRR | 70–85 dB | 80–100 dB | 110–140 dB |
| PSRR | 70–100 dB | 80–100 dB | 110–140 dB |
| I_B (BJT input) | 10 nA – 1 µA | — | < 10 nA |
| I_B (FET input) | — | 1–50 pA | 0.5–5 pA |
| I_B (CMOS input) | 0.04–10 pA | 0.04–1 pA | 0.05–0.5 pA |
Output saturation — “rail-to-rail” decoded
- RRO (rail-to-rail output) — output can swing within ≈ 50–200 mV of each rail at light load (1 mA), but rises rapidly with load. At 10 mA, expect 100–300 mV headroom from each rail. The “rail-to-rail” claim only holds with no load.
- RRI (rail-to-rail input) — common-mode input range extends to (or slightly beyond) both rails. Implemented as parallel NPN+PNP differential pairs that hand off near mid-supply; CMRR drops by 20–40 dB at the crossover and V_os can have a discontinuity.
- RRIO — both. Useful in single-supply 3.3 V designs where every millivolt of headroom matters.
- Op-amps without RR in the name — typical input common-mode range is V− + 2 V to V+ − 2 V; typical output range is V− + 1 V to V+ − 1.5 V (BJT output) or close to the rails at no load (CMOS output).
Input common-mode range — what happens at the edge
Standard BJT-input op-amp at V_CM ≈ V− or V_CM ≈ V+: the input stage starves of bias current, gain collapses, V_os shifts dramatically, and the part may “phase reverse” (LM324, LM358). RRI parts handle the rails gracefully but have a CMRR notch at the differential-pair handoff voltage.
Input bias current — by technology
| Input tech | I_B at 25 °C | I_B temperature behaviour |
|---|---|---|
| Standard BJT | 10 nA – 1 µA | Roughly constant; tracks β |
| Super-beta BJT (LT1012, OP07) | 30 pA – 1 nA | Constant |
| Bias-compensated BJT (OPA277) | < 1 nA, can be either polarity | Constant, with cancellation circuit |
| JFET input | 1–50 pA at 25 °C | Doubles every 10 °C; 50 pA at 25 °C → 6 nA at 100 °C |
| CMOS input | 0.04–10 pA at 25 °C | Doubles every 10 °C |
| Electrometer-grade FET (LMP7721) | < 3 fA | Tested only at 25 °C |
5c. Variants & topologies
Single-op-amp building blocks
Several dozen distinct circuit topologies are built around a single op-amp. The standard set, in addition to those covered in section 3, includes:
- Precision rectifier (“ideal diode”) — eliminates the 0.6 V diode drop by placing a diode inside the feedback loop. Half-wave and full-wave variants exist.
- Logarithmic amplifier — feedback element is a diode or BJT; output is proportional to ln(V_in). Used in audio compressors, optical-power meters.
- Antilog (exponential) amplifier — diode in the input branch instead of feedback.
- Voltage-to-current converter (Howland current pump) — drives a current proportional to V_in into a floating load.
- Current-to-voltage converter — the transimpedance amplifier (section 3, example 2).
- Sample-and-hold — op-amp buffer + analog switch + holding capacitor.
- Peak detector — diode + holding cap inside a feedback loop.
- Comparator (sometimes) — a fast op-amp without feedback. Caveat: dedicated comparators (LM393, LMV7235) have open-collector or push-pull digital outputs, ~50 ns response, and tolerate inputs beyond the rails; op-amps used as comparators are slow (slew-limited), may not recover from saturation, and may damage the input stage at rail-overdrive. Use a comparator unless you have a specific reason not to.
Multi-op-amp blocks
- Instrumentation amplifier (in-amp) — three-op-amp topology; standard sensor front-end (see section 3).
- Isolation amplifier — input and output sections galvanically isolated by transformer, optocoupler, or capacitive barrier. ISO124, AMC1200, ACPL-C87B. For medical, industrial high-CMV, and BMS shunt-monitoring applications.
- Current-sense amplifier — high-side or bidirectional shunt-monitor; built-in resistor network sets fixed gain. INA240, INA180, MAX9918. Bidirectional parts (e.g. INA240) reference the output at V_REF/2 so they can show signed shunt current on a single supply.
- Programmable-gain amplifier (PGA) — gain digitally selected over a wide range. PGA113, LTC6915, AD8253. Used in front of ADCs to optimise dynamic range.
- Variable-gain amplifier (VGA) — analog-controlled (voltage-tuned) gain. AD8367, VCA821. RF and AGC loops.
- Composite amplifier — one op-amp inside the feedback loop of another, to combine (e.g.) the offset of a precision part with the bandwidth or output current of a faster part.
Special-purpose op-amps
- Chopper-stabilised / auto-zero / zero-drift — internally re-zeroes the input offset by switching between two paths. Effective V_os < 5 µV and no 1/f noise. Output noise spectrum has chopper-clock spikes (~10 kHz) that must be filtered out. Slow recovery from saturation (1–10 ms).
- Photodiode-front-end op-amps — internal low-input-capacitance, low-bias-current design optimised for TIA stability. OPA381, LMP7721, ADA4530-1 (femtoampere bias).
- Software-trimmed precision — internal DAC trims V_os in production; available trim values are stored in non-volatile memory. OPA188, MAX9617.
- Difference amplifier with thin-film matched resistors — monolithic four-resistor difference amp guaranteed for CMRR; INA117 (200 V common-mode), AD629 (270 V common-mode), INA149.
- Fully-differential amplifiers (FDA) — differential input and differential output; standard ADC driver. THS4521, ADA4940-1.
- Single-supply op-amps designed for “ground sensing” — input common-mode includes V−. LM358 was the original; modern parts (e.g. LMV358) without the LM358’s phase-reversal pathology.
6c. Selection criteria
The op-amp catalogue has tens of thousands of entries. Selection works best as a top-down decision tree.
Step 1 — what is the application?
- DC precision (sensor amplifier, reference, weigh-scale, thermocouple, load cell): offset, drift, and 1/f noise dominate.
- Audio (signal path, microphone preamp, line driver): voltage noise density, THD, slew rate matter; CMRR less critical.
- General signal conditioning (filtering, level-shifting, buffering): GBP and slew rate vs amplitude.
- Photodiode / charge-amp / electrometer: bias current dominates everything else.
- High-speed (video, IF, ADC drive): GBP, SR, settling time.
- Power op-amp (servo, piezo, laser diode, audio amp): output current, voltage swing, thermal.
Step 2 — supply voltage
Does the part run from the available rails? “Single-supply” is a marketing term; what matters is minimum operating V_S (some go to 1.8 V, some need 6 V), and maximum operating V_S (3.3 V parts pop at 5.5 V abs-max). A high-voltage analog rail (±15 V or ±30 V) opens a much larger part catalogue than a 3.3 V single supply, but raises BoM cost.
Step 3 — input/output range
- Rail-to-rail input (RRI) needed if the signal goes near either supply rail. Mandatory for single-supply 3.3 V systems where the sensor common-mode is near ground.
- Rail-to-rail output (RRO) needed to use most of the supply range; required when driving low-impedance ADC inputs from a 3.3 V rail.
- RRIO is the default for modern low-V single-supply.
Step 4 — input bias current
| Source impedance | Op-amp tech |
|---|---|
| < 1 kΩ | Bipolar input fine; lowest V_os parts are BJT |
| 1 kΩ – 100 kΩ | Bias-compensated BJT or JFET; consider V_os × R_S vs I_B × R_S |
| 100 kΩ – 10 MΩ | JFET or CMOS |
| > 10 MΩ | CMOS or electrometer-grade |
| Photodiode (high impedance, want zero leakage) | CMOS or electrometer-grade |
Step 5 — offset and drift
Set by precision requirement. A 16-bit ADC has ½ LSB = 75 µV at 5 V FS. To preserve that, total V_os contribution should be < 25 µV — which mandates a precision part (OPA277, AD8628, LTC2057). For audio or display the requirement is much looser; 1–2 mV V_os is invisible.
Step 6 — noise
For audio and instrumentation, voltage noise density e_n (nV/√Hz) and 1/f corner matter. Rough budget:
- Studio audio: e_n < 5 nV/√Hz, 1/f corner < 10 Hz.
- Consumer audio: e_n < 20 nV/√Hz.
- Microphone preamp: e_n < 2 nV/√Hz with i_n appropriate to source.
- Photodiode TIA: i_n × R_f must be lower than R_f Johnson noise.
Step 7 — bandwidth (GBP) and slew rate
Set by signal bandwidth × closed-loop gain. Then check SR against output amplitude. Add 5–10× margin over the strictest of (a) signal BW × G < GBP, (b) 2π·f·V_p < SR.
Step 8 — output current and load
Most op-amps source/sink 10–20 mA. Driving a 50 Ω cable, an 8 Ω speaker, or a laser-diode bias circuit needs a power op-amp (OPA547, LME49810). Driving an ADC sample-and-hold needs settling-time spec, not steady-state current.
Step 9 — package & cost
DIP for prototyping, SOIC and SOT-23 for production, WLCSP for handheld. Op-amp BoM cost ranges from USD 0.05 (LM358) to USD 30+ (precision low-noise like AD797 or LT1028 in multiples). Op-amp choice often dominates a signal-chain BoM.
A common pitfall
Designers fixate on bandwidth and miss that V_os drift × ΔT × gain exceeds the signal. Always compute the offset error budget first; then pick noise; then bandwidth.
7c. Datasheet decoding
”Typical” vs “max”
The first column of the electrical-characteristics table is typical — median of a production lot at 25 °C. The max column is the production-test guarantee. Design to max. Some parts spec only “typ” for noise density and drift; the actual unit-to-unit variation can be 2–3×.
Conditions are everything
Every electrical parameter is qualified by:
- Supply voltage V_S
- Junction temperature T_J (some specs are 25 °C only; “−40 to +85 °C” max is the real worst case)
- Input common-mode voltage V_CM
- Output load R_L
- Frequency (for noise, CMRR, PSRR)
A part with “V_os = 50 µV” at 25 °C, V_S = 5 V, V_CM = V_S/2 may be 500 µV at the corners of the operating envelope.
Voltage noise density and integration
Datasheet e_n is input-referred, typically at 1 kHz and at 10 Hz (1/f region). Total RMS noise at the output over a bandwidth BW is:
V_n,rms,out = G_noise · √(e_n² · BW · 1.57)
where 1.57 = π/2 is the brick-wall to first-order-filter correction factor, and 1.57·BW is the noise-equivalent bandwidth. Add 1/f contribution at low frequencies.
For multi-decade noise calculation (DC to 100 kHz):
V_n,rms = √(e_n_white² · 1.57·BW + e_n_1f² · f_c_1f · ln(f_max/f_min))
Auto-zero parts eliminate the 1/f term.
CMRR and PSRR
- CMRR = 20·log(ΔV_CM / ΔV_os) — how much input offset shift you get for a change in input common-mode. 80 dB means 10 mV/100 mV = 100× rejection.
- PSRR = 20·log(ΔV_S / ΔV_os) — same idea for supply voltage. PSRR rolls off at −20 dB/decade above the first internal pole; at 100 kHz, 100 dB DC-PSRR is typically 60 dB.
CMRR is specified at DC; at audio and RF frequencies it can be 30–60 dB worse, which often matters more than the headline number.
Capacitive load handling
Most general-purpose op-amps oscillate when driving > 100 pF load. The datasheet “stability vs C_L” curve shows phase margin; below 45° = guaranteed oscillation. Symptoms: square-wave step response shows ringing or sustained oscillation, output looks “fuzzy” on a scope, or full-on oscillation at 1–50 MHz overlaying the desired signal.
Mitigation:
- Add a series isolation resistor (10–100 Ω) between op-amp output and the capacitive load, inside the feedback loop or outside depending on whether the load voltage or output voltage is the regulated quantity.
- Use an op-amp specifically rated to drive capacitive loads (LMC6482, OPA567 — drives up to 1 nF directly).
Output short-circuit current and thermal shutdown
Datasheet I_SC is typically 30–100 mA. Holding the output shorted heats the die rapidly; many parts have internal thermal-shutdown around T_J = 150 °C that protects the part but does not protect downstream circuitry. A op-amp in thermal foldback may produce an arbitrary output until it cools.
Settling time
For data-converter drivers, the slew rate gets you close to the final value; the settling-time specification (to 0.1 % or 0.01 % or 1 LSB) tells you when you can sample. Settling is dominated by the small-signal poles after slew; it can be much longer than the SR-based estimate. Always read the settling-time spec for ADC drivers.
Slew-rate asymmetry
Many op-amps have different positive and negative slew rates (often 2× different). At full slew the output is distorted; this asymmetry contributes second-harmonic distortion. Audio op-amps (OPA1611, NE5532) are characterised for matched SR.
8c. Drive / interface electronics
The passive components around an op-amp are part of the design, not an afterthought.
Feedback network
- Resistors. Thin-film (0.1 %, 25 ppm/°C) for precision and difference-amp matching; metal-film (1 %, 50–100 ppm/°C) for general use; never carbon composition (excess current noise) in a signal-path feedback network. For TIA designs, the feedback resistor’s parasitic capacitance (0.1–0.5 pF for through-hole, 0.05–0.1 pF for thin-film SMD) sets the high-frequency limit.
- Capacitors. C0G/NP0 ceramic, polypropylene, or polystyrene in the signal path — low dielectric absorption (DA). Avoid X7R: its DA causes voltage-dependent capacitance shifts (10–20 % under bias), which translates to distortion and settling-time anomalies.
Power-supply decoupling
Every op-amp supply pin needs a local 0.1 µF ceramic (C0G or X7R) within < 5 mm, plus a 1–10 µF bulk capacitor nearby. For high-PSRR work, add a ferrite bead or RC filter (10 Ω + 1 µF) between the op-amp supply and the system rail to reject switching-converter ripple.
Output series resistor
A 10–100 Ω series resistor at the op-amp output isolates capacitive load (cable capacitance, FET gate, ADC sample-cap) and is mandatory for stability when driving any non-trivial C. The resistor is typically inside the feedback loop (output sensed after the resistor) for AC gain accuracy.
Inverting-input stray capacitance
Any stray capacitance C_s at the inverting input (PCB trace, op-amp pin, photodiode) creates a pole at 1/(2π·R_f·C_s) in the feedback loop that can erode phase margin and cause oscillation in high-gain or high-impedance inverting circuits. Mitigation:
- Keep the inverting-input trace short and narrow; avoid copper pours adjacent to it.
- Add a small feedback capacitor C_f across R_f to introduce a compensating zero. The standard rule: C_f · R_f = C_s · R_in (matched pole-zero).
Input protection
Op-amp inputs are typically rated to V_S + 0.3 V max. For sensor inputs that can exceed this (industrial 0–10 V going into a 5 V op-amp, ESD events, miswiring): add Schottky clamps to both rails through series current-limiting resistors (typically 1 kΩ – 10 kΩ). For very-high-impedance inputs, the series resistor must be chosen carefully against I_B × R noise.
Guard rings and PCB cleanliness (electrometer-grade)
For sub-pA bias-current designs:
- Guard ring — a copper ring around the inverting-input trace driven by the same voltage as the inverting input (a buffer of the (+) node). Eliminates surface leakage by holding zero voltage across any leakage path.
- Air-wire the critical input — solder the input pin to a Teflon standoff or air-bridge it to avoid PCB leakage.
- Clean the board after assembly (no-clean flux is not zero-residue at electrometer impedance); a final wash with IPA + ultrasonic + bake is standard for sub-pA designs.
- Conformal coat with a low-DA, low-leakage compound for long-term reliability.
9c. Real parts & sourcing
Major manufacturers (2026)
| Vendor | Strengths | Notable lines |
|---|---|---|
| Texas Instruments (TI) | Broadest catalogue; competitive pricing; deep app-note library | OPAx, LMx, INA, THS, TLV |
| Analog Devices (ADI, now incl. Linear Tech & Maxim) | Precision, high-speed, in-amp, isolation | AD8xx, LTC, AD62x, AD86xx, LT1xxx, MAX |
| STMicroelectronics | General-purpose, automotive | TSV, TSU, TSZ |
| onsemi | Cost-down general purpose | NCS, MC |
| NXP | Automotive analog | OPA-class, MC33 family |
| Microchip | MCU-friendly CMOS, integrated PGAs | MCP6xxx |
| Renesas (incl. Intersil) | Industrial precision, high-V | EL, ISL, ICL |
| Apex / Cirrus Logic | High-voltage and high-current power op-amps | PAxx |
| Diodes Inc. | Cost-down jellybean SMD | AS family |
Distributors
- Digi-Key, Mouser — broadest stock, fastest shipping, authoritative for U.S./Europe production.
- Arrow, Avnet — volume pricing, allocation parts.
- RS Components, Farnell / Element14 — Europe + UK distribution.
- LCSC, WCH — China distribution; cost-competitive on jellybeans but verify part authenticity.
Counterfeit risk
Old / specialty / legacy parts (OP07, LT1028, LT1037, OP-27, NE5532, vintage TI) attract counterfeits — especially “new old stock” listings on eBay, AliExpress, and grey-market resellers. For production builds, only purchase from authorised distributors with full traceability. Counterfeit op-amps may be relabelled commodity parts (an LM358 die in an OPA627 package), salvaged-and-resold die from scrapped equipment, or outright non-functional. Symptoms: V_os 10× spec, noise 5× spec, or simply doesn’t pass functional test.
Pricing buckets (2026, ~1 ku, USD)
- Jellybean (LM358, TL072, MCP6002): USD 0.05–0.20
- Audio / general SMD (NE5532, OPA1612): USD 0.30–1.50
- Precision (OPA277, AD8628): USD 2–5
- High-speed (OPA847, LM7171): USD 5–15
- Zero-drift, monolithic in-amp (LTC2057, AD8628, AD620): USD 5–20
- Power op-amp (OPA547, OPA549): USD 10–30
- High-voltage piezo driver (PA98, PA107): USD 200–600
Long-term availability
ADI and TI generally guarantee 10+ year availability for catalog parts; some lines (LM358, TL072, NE5532, LM741) have been in continuous production since the 1970s and have second-source manufacturers. Newer or specialty parts (electrometer-grade, high-voltage power) may be sole-sourced — factor obsolescence risk into selection for products with > 5 year lifetimes.
10c. Failure modes & derating
Input common-mode violation
When V_CM exceeds the input common-mode range, an op-amp goes non-linear. Three outcomes are observed:
- Saturation — output stuck at one rail until V_CM returns to range. Recovery is fast.
- Phase reversal (LM324, LM358, LM741 and clones). When the (+) input drops below V− by ~0.3 V (i.e. tries to go below ground in a single-supply circuit), the output flips to the opposite rail and stays there until V+ returns to range. This is a famous LM324/LM358 design pitfall — modern replacements (LMV324, TLV2474) explicitly state “no phase reversal” and should be used in new single-supply designs.
- Input destruction. If the input is taken outside the supplies by more than ~0.3 V at non-trivial current, internal ESD clamp diodes conduct; sustained current damages them. Always add an external series resistor for inputs exposed to user wiring or long cables.
Oscillation
Most-common debug topic. Causes, ranked:
- Capacitive load at the output — most common. Add output isolation resistor.
- Inverting-input stray capacitance — high-impedance feedback networks or long traces. Add C_f across R_f.
- Poor supply decoupling — local decoupling caps too far away or too small. 0.1 µF within 5 mm of every supply pin.
- Ground loops / shared return paths — input ground and output ground tied at the wrong node.
- Inadequate phase margin from a decompensated op-amp at too low a gain — check minimum stable gain in the datasheet.
ESD damage
Most op-amp inputs are rated 2 kV HBM (human body model). Industrial parts (TI’s “ESD-protected” line, ADI’s iCoupler-isolated parts) go to 8 kV HBM, 4 kV CDM. For inputs exposed to user contact, add a TVS diode (e.g. ESD7L5.0DT5G, USBLC6) plus a 100 Ω – 1 kΩ series resistor in front of the input pin.
Latch-up
CMOS op-amps can latch up if an input exceeds a rail by more than ~0.3 V at currents above ~20 mA (parasitic SCR triggers). Once latched, the part draws supply current until power is cycled, typically destroying itself within seconds. Mitigation: series current-limit resistors and clamp diodes on every input that can be driven beyond the rails (cabled inputs, hot-swap interfaces, automotive load-dump).
Reverse-supply damage
Connecting V+ and V− backwards destroys virtually every op-amp in the catalogue. The substrate diode conducts heavily and bonds melt. For applications with field-replaceable rails (battery-powered, automotive), add a series Schottky in the supply or a P-channel MOSFET in reverse-polarity-protection topology.
Saturation recovery
When an op-amp’s output hits a rail and stays there for milliseconds (e.g. a comparator-like overload event), the internal stages saturate and require recovery time when the signal returns to range. Standard parts recover in 1–10 µs; chopper-stabilised parts can take 1–10 ms because the auto-zero loop must re-acquire. For applications with intermittent overloads followed by precision measurement (e.g. weigh-scale tare or thermocouple cold-junction transition), choose either a fast-recovering precision part (OPA227) or add an external clamp that prevents saturation in the first place.
Bias-current temperature dependence
BJT-input parts: I_B is roughly constant with temperature (small drift). FET-input and CMOS parts: I_B doubles every 10 °C. A 1 pA part at 25 °C is 1 nA at 95 °C and 32 nA at 145 °C. For sensor electronics in outdoor / automotive / underhood environments (T_amb up to 105 °C, T_J higher), choose either BJT-input precision or chopper parts that re-zero away the resulting offset shift.
PCB leakage at sub-pA
At I_B levels below ~10 pA, board contaminants (flux residue, fingerprints, atmospheric moisture absorbed by FR-4) create surface conduction paths whose resistance — gigaohms to teraohms — competes with the op-amp’s internal leakage. Mitigations: guard ring (section 8c), Teflon standoff for the input pin, ultrasonic IPA clean + bake-dry + conformal coat, low-humidity enclosure for the most demanding (femtoampere) circuits.
Output-load thermal derating
Power op-amps have internal SOA curves analogous to power MOSFETs ([[Engineering/semiconductor-devices]]). Driving a reactive load (motor, speaker, transducer) the instantaneous V × I product can be 2× the steady-state value and the part must handle it within its pulsed-SOA envelope. The first second of operation under fault is when most power op-amps fail. Always check pulsed SOA, not just continuous dissipation.
Long-term drift
Long-term V_os drift is rarely specified but typically 0.1 to 1 µV per √month for precision BJT parts and an order of magnitude smaller for auto-zero parts. For instruments expected to maintain calibration over years, design for periodic auto-calibration (chopper / auto-zero parts substantially eliminate the drift) or accept the drift in the calibration interval.
11. Cross-references
[[Engineering/circuit-analysis]]— node analysis, KCL/KVL, and Thevenin/Norton equivalents are the prerequisite for every op-amp circuit. The virtual-short technique is just KCL at the inverting node with the (+) voltage substituted.[[Engineering/semiconductor-devices]]— the differential pairs, current mirrors, and class-AB output stages inside every op-amp; understanding semiconductor noise and matching makes datasheet specs predictable.[[Engineering/ac-analysis-three-phase]]— phasor / impedance machinery used in active-filter design and op-amp frequency-response analysis.[[Engineering/digital-logic]]— op-amps are the analog precursor to (and remain integrated alongside) CMOS digital blocks in mixed-signal ICs.[[Engineering/pcb-design]]— guard rings, decoupling discipline, output-isolation resistors, and stability layout are PCB-level concerns.[[Engineering/power-electronics]]— op-amps serve as error amplifiers inside the control loops of every linear and switching regulator.[[Engineering/microcontrollers]]— modern MCUs integrate op-amps and PGAs on-chip; the same selection logic applies to the internal blocks.[[Engineering/classical-control]]— feedback-control theory originated in op-amp analog computing; loop-gain, phase margin, and root-locus concepts all transfer directly.[[Robotics/sensors-pose-motion]]— strain gauges, accelerometer ASIC outputs, and Hall sensors all need op-amp / in-amp signal conditioning.[[Robotics/sensors-force-tactile]]— load cells and force-sensing resistors need precision DC amplification (zero-drift in-amps).[[Languages/Tier3/hdl]]— netlist syntax for capturing and simulating op-amp circuits; manufacturers publish SPICE subcircuits for every modern part.
12. Citations
- Sedra, A. S. & Smith, K. C. (2019). Microelectronic Circuits (8th ed.). Oxford University Press. The standard textbook derivation of every op-amp topology in section 3, with internal-stage models.
- Horowitz, P. & Hill, W. (2015). The Art of Electronics (3rd ed.). Cambridge University Press. The most-cited practical reference; Chapter 4 (“Operational Amplifiers”) and Chapter 5 (“Precision Circuits”) are the standard practitioner introduction.
- Jung, W. (Ed.) (2005). Op Amp Applications Handbook. Newnes / Analog Devices. The encyclopaedic reference, freely downloadable from ADI; covers every topology, every parameter, every datasheet trap.
- Mancini, R. & Carter, B. (2009). Op Amps for Everyone (3rd ed.). Newnes / Texas Instruments. Freely available; the TI counterpart to Jung’s handbook, with current TI-part-focused worked examples.
- Williams, J. (1991, 1992). Analog Circuit Design: Art, Science, and Personalities and The Art and Science of Analog Circuit Design. Newnes. Jim Williams’s collected Linear Technology application notes; the standard reading on precision analog engineering judgement.
- Pease, R. (1991). Troubleshooting Analog Circuits. Newnes. Bob Pease’s classic; the definitive guide to oscillation, instability, and the gap between simulation and bench.
- Razavi, B. (2016). Design of Analog CMOS Integrated Circuits (2nd ed.). McGraw-Hill. The graduate-level reference for the CMOS internals of modern op-amps — differential pairs, current mirrors, frequency compensation.
- Gray, P. R., Hurst, P. J., Lewis, S. H. & Meyer, R. G. (2009). Analysis and Design of Analog Integrated Circuits (5th ed.). Wiley. The other standard graduate IC text; deep coverage of noise, feedback, and compensation.
- Kitchin, C. & Counts, L. (2006). A Designer’s Guide to Instrumentation Amplifiers (3rd ed.). Analog Devices. Free ADI publication; the practical reference for in-amp selection and use.
- IEC 60747-5 (2024). Semiconductor devices — Discrete devices — Part 5: Optoelectronic devices and operational amplifiers. International Electrotechnical Commission. The international standard for op-amp parameter definitions and test methods.
- JEDEC JESD22 family (various dates). Reliability Test Methods for Discrete Semiconductor Devices and Integrated Circuits. Test methodology behind reliability claims on every commercial op-amp.
- MIL-STD-883 Test Method Standard, Microcircuits. U.S. Department of Defense. High-reliability and aerospace qualification test methods.
- AEC-Q100. Failure Mechanism Based Stress Test Qualification for Integrated Circuits. Automotive Electronics Council. Mandatory qualification standard for automotive op-amps and analog ICs.
- Manufacturer datasheets and application notes (the binding contractual specifications): Texas Instruments OPAx / LMx / INAx / THSx; Analog Devices AD8xxx / OPxx / LTC / MAX; STMicroelectronics TSV / TSU / TSZ; Microchip MCP6xxx; Renesas EL / ISL; Apex PAxx. Always read the latest revision before committing a design to fab.